Fault-Tolerance Testing for Quantum Error Correction Codes

I am pleased to highlight some recent work from the team that further evolves our understanding of building practical quantum computing architectures with bivariate bicycle codes and that addresses one of the fundamental challenges to real-time decoding. Our Nature paper from 2024 [https://lnkd.in/eS26sKx6] showed that a quantum memory using bivariate bicycle codes requires roughly 10x fewer physical qubits compared to the surface code. An important question to answer was whether this advantage is retained not only while storing information in memory but also during computations. To answer that question, our team designed fault-tolerant logical instruction sets for the codes and developed a strategy to compile circuits to these instructions. Using these tools, they performed end-to-end resource estimates demonstrating that bicycle architectures retain an order of magnitude qubit advantage over surface code architectures when implementing large logical circuits. The pre-print can be found here [https://lnkd.in/e7k7gYs7] One of the central doubts about the practicality of quantum low-density parity check (qLDPC) codes such as the bivariate bicycle codes has been the difficulty of real-time decoding. The second preprint [https://lnkd.in/eFbWNFeU] we posted this week hopefully puts those doubts to rest. A large challenge in decoding qLDPC codes arises from the perceived need for two-stage decoding solutions such as belief propagation (BP) followed by ordered statistics decoding (OSD). In particular, real-time implementation of OSD appears very challenging, which has spawned efforts to reduce the cost of OSD. Our team took a different approach. This new result shows that one can eliminate the need for a second-stage decoder altogether through a suitable modification of the BP algorithm. Our modified algorithm, called Relay-BP, enhances the traditional method by incorporating spatially disordered memory terms. This dampens oscillations and breaks symmetries that trap traditional BP algorithms. The result is an algorithm that outperforms the current state-of-the-art approach while simultaneously still being amenable to implementation in an FPGA. Congratulations to the team for these exciting advancements, which validate our strategy and move us one step closer to realizing a fault-tolerant quantum system.

Many talk about surface codes. But what if they’re not the future? Quantum Low-density parity-check (qLDPC) codes are gaining traction 𝗳𝗮𝘀𝘁. IBM is building fault-tolerant memories using Bivariate Bicycle (BB) codes. IQM Quantum Computers is designing hardware with qLDPC in mind. And now, a new experiment from China shows the 𝗳𝗶𝗿𝘀𝘁 𝘄𝗼𝗿𝗸𝗶𝗻𝗴 𝗾𝗟𝗗𝗣𝗖 𝗰𝗼𝗱𝗲 𝗼𝗻 𝗮 𝘀𝘂𝗽𝗲𝗿𝗰𝗼𝗻𝗱𝘂𝗰𝘁𝗶𝗻𝗴 𝗾𝘂𝗮𝗻𝘁𝘂𝗺 𝗽𝗿𝗼𝗰𝗲𝘀𝘀𝗼𝗿. On the 32-qubit Kunlun chip, researchers implemented: • 𝗔 [[𝟭𝟴, 𝟰, 𝟰]] 𝗕𝗕 𝗰𝗼𝗱𝗲 • 𝗔 [[𝟭𝟴, 𝟲, 𝟯]] 𝗾𝗟𝗗𝗣𝗖 𝗰𝗼𝗱𝗲    The notation [[𝗻, 𝗸, 𝗱]] describes a quantum error correction code that uses 𝗻 physical qubits to encode 𝗸 logical qubits, with 𝗱 being the code distance. Unlike surface codes, LDPC codes keep each error check (called a stabilizer) connected to only a small number of qubits—just 6 in this case—even as the code scales. That means fewer ancillas, fewer gates, and potentially lower overhead for fault tolerance. The hardware was purpose-built for this experiment: • 𝟯𝟮 𝗳𝗿𝗲𝗾𝘂𝗲𝗻𝗰𝘆-𝘁𝘂𝗻𝗮𝗯𝗹𝗲 𝘁𝗿𝗮𝗻𝘀𝗺𝗼𝗻 𝗾𝘂𝗯𝗶𝘁𝘀 • 𝟴𝟰 𝘁𝘂𝗻𝗮𝗯𝗹𝗲 𝗰𝗼𝘂𝗽𝗹𝗲𝗿𝘀, enabling non-local interactions up to 𝟲.𝟱 𝗺𝗺 apart • 𝗔𝗶𝗿 𝗯𝗿𝗶𝗱𝗴𝗲𝘀 to support a crossbar-style layout • Stabilizer checks executed in just 𝟳 𝗖𝗭 𝗹𝗮𝘆𝗲𝗿𝘀    Gate fidelities were solid: • Single qubit: 99.95% • Two-qubit: 99.22%    The decoding was performed offline using 𝗯𝗲𝗹𝗶𝗲𝗳 𝗽𝗿𝗼𝗽𝗮𝗴𝗮𝘁𝗶𝗼𝗻 𝘄𝗶𝘁𝗵 𝗼𝗿𝗱𝗲𝗿𝗲𝗱 𝘀𝘁𝗮𝘁𝗶𝘀𝘁𝗶𝗰𝘀 𝗱𝗲𝗰𝗼𝗱𝗶𝗻𝗴 (𝗕𝗣-𝗢𝗦𝗗)—an approach better suited to LDPC-style codes. Logical error rates were: • 𝗕𝗕: 𝟴.𝟵𝟭 ± 𝟬.𝟭𝟳% • 𝗾𝗟𝗗𝗣𝗖: 𝟳.𝟳𝟳 ± 𝟬.𝟭𝟮%    Both are still above the physical qubit error rate—but 𝘀𝗶𝗺𝘂𝗹𝗮𝘁𝗶𝗼𝗻𝘀 𝘀𝗵𝗼𝘄 𝘁𝗵𝗮𝘁 𝗮 𝟮× 𝗶𝗺𝗽𝗿𝗼𝘃𝗲𝗺𝗲𝗻𝘁 𝗶𝗻 𝗳𝗶𝗱𝗲𝗹𝗶𝘁𝘆 𝘄𝗼𝘂𝗹𝗱 𝗯𝗲 𝗲𝗻𝗼𝘂𝗴𝗵 𝘁𝗼 𝗽𝘂𝘀𝗵 𝘁𝗵𝗲𝘀𝗲 𝗰𝗼𝗱𝗲𝘀 𝗯𝗲𝗹𝗼𝘄 𝘁𝗵𝗿𝗲𝘀𝗵𝗼𝗹𝗱. qLDPC codes are no longer just a concept—they’re being implemented, measured, and decoded on superconducting hardware. 📸 Image Credits: Ke Wang, Zhide Lu, Chuanyu Zhang et al. (2025, arXiv)

Google Quantum AI Demonstrates Three Dynamic Surface Codes, Advancing Fault-Tolerant Quantum Computing Introduction Quantum computers promise exponential gains but remain constrained by extreme fragility: qubits are easily disrupted by noise, making error correction the central challenge of the field. Google Quantum AI has now taken a major step toward practical fault tolerance by successfully implementing three dynamic versions of the surface code—one of the most promising quantum error-correction frameworks. Key Developments • The team realized three distinct dynamic surface code circuits—hex, iSWAP, and walking—originally proposed in theoretical work by co-author Matt McEwen. • Their experiments validate that multiple circuit variations can work on real hardware, expanding pathways for adapting error-correction codes to specific device architectures. • Hex circuit: Recompiles the surface code onto a hexagonal grid, reducing connectivity requirements from four neighbors to three. This simplifies fabrication and achieved 2.15× better error suppression. • iSWAP circuit: Replaces CZ gates with iSWAP gates, which are easier to execute and avoid leakage errors. Though they introduce CPHASE errors, the team showed strong performance even on hardware optimized for CZ gates, achieving 1.56× error suppression. • Walking circuit: Allows qubits to exchange roles, effectively “walking” logical information across the chip. This helps isolate and clean leakage errors and offers a new method for routing logical qubits, delivering 1.69× better suppression. • All three implementations successfully detected and corrected noise without disturbing quantum information, confirming the practicality of dynamic constructions. Scientific Significance • This is the strongest evidence yet that dynamic surface codes—adapted to hardware constraints—can function reliably in real quantum devices. • The team also introduced a simplified “detector budgeting” technique, enabling easier analysis of how specific error sources impact logical performance. • The work opens new avenues for designing codes tailored to imperfect hardware, enabling better yield and robustness as systems scale. • Upcoming experiments will explore even more advanced dynamic circuits, including those based on the LUCI framework for routing around faulty qubits. Why This Matters Reliable quantum error correction is the linchpin for large-scale quantum computing. Google’s demonstration shows that error-correcting codes can be adapted dynamically to real hardware constraints—unlocking higher performance, easier fabrication, and more flexible architectures. This progress accelerates the roadmap toward fault-tolerant quantum systems capable of solving real-world scientific and industrial problems. I share daily insights with 34,000+ followers across defense, tech, and policy. If this topic resonates, I invite you to connect and continue the conversation. Keith King https://lnkd.in/gHPvUttw

A quantum computer that learns from its own errors while it's computing. That's the framing in a recent paper from Google Quantum AI and Google DeepMind on reinforcement learning control of quantum error correction. Large quantum processors drift. The standard fix is to halt the computation and recalibrate, which won't scale to algorithms expected to run for days or weeks. The authors ask whether QEC can calibrate itself from the data it already produces. The idea: repurpose error detection events as a training signal for a reinforcement learning agent that continuously tunes the physical control parameters (pulse amplitudes, detunings, DRAG coefficients, CZ parameters, and so on). Rather than optimizing logical error rate directly, which is expensive and global, the agent minimizes average detector-event rate, a cheap local proxy whose gradient is approximately aligned with the gradient of LER in the small-perturbation regime. The results on a Willow superconducting processor: - On distance-5 surface and color codes, RL fine-tuning after conventional calibration and expert tuning yields about 20% additional LER suppression - Against injected drift, RL steering improves logical stability 2.4x, rising to 3.5x when decoder parameters are also steered - New record logical error per cycle: 7.72(9)×10⁻⁴ for a distance-7 surface code (with the AlphaQubit2 decoder) and 8.19(14)×10⁻³ for a distance-5 color code (with Tesseract) - In simulation, the framework scales to a distance-15 surface code with roughly 40,000 control parameters, with a convergence rate that is independent of system size The broader takeaway: calibration and computation may not need to be separate phases. If detector statistics can carry enough information to steer a large control stack online, fault tolerance becomes less about pausing to retune and more about a processor that keeps learning while it computes. Worth noting that the current experiments rely on short repeated memory circuits, so real-time steering during a single long logical algorithm (where exploration noise would affect the computation directly) remains future work. Paper: https://lnkd.in/gVQXnpzZ