The Dawn of Software Defined Chips

Bad Moon Rising

In 2010, my business unit at AppliedMicro had a leadership position in Optical Transport Networking (OTN), the standard protocol for high speed Internet traffic over long distances, such as, between data centers, from city to city, and under oceans. The prevailing speed at that time was 10Gbits/second. Our standard 10G chips had been built on inexpensive processes and were in volume production. We had a straightforward path in expensive processes to achieve higher levels of integration, more 10G ports per chip, but were concerned about the industry’s drive to 100G. It turned out that the standards for 100G were still in flux, and the cost of optical modules were still well above levels that would support mass deployment. So, we continued along with our plan; however, customers continued asking about our plans and timelines for 100G. Time was not on our side. The design cycles for OTN line cards started about two years before going into production, and chip designs took 18-24 months prior to that. Even worse, it took 1- 2 years to move into volume. So, here we were in 2010, being challenged by our most important customers to build chips in 2011, for low volumes in 2014, and volume production in 2016. Compounding these issues were unratified standards and changing systems architectures. There was simply no way to get a chip right the first time. The final challenge: we needed a solid product roadmap to stay in front of these customers, or our competitors would replace us.

A new 100G ASSP was too large a bet to make in 2011. We could fool ourselves into believing that a financial hurdle could be exceeded, but in reality, it just wasn't true. I felt strongly that we needed a solution to overcome these challenges. The only feasible approach we could think of was the use of an FPGA from Altera or Xilinx, with a subset of an ASSP design done with the biggest, baddest (and most expensive) FPGAs then available. There were multiple impediments:

1. While our engineering teams were very strong in the functional space, their experience with FPGA designs was limited
2. We honestly believed that our engineering teams would not buy into an FPGA strategy
3. They were mostly committed to existing projects
4. Winning designs would likely exceed the logic and memory capacity of currently available FPGAs
5. There was not a proven business model

Then came TPACK.

Who’ll Stop the Rain?

A 30-person company located in Copenhagen, TPACK, had OTN systems knowledge, superb FPGA skills, and a compatible customer base. In addition, TPACK was a long way down the road towards making a Software Defined Chips business model work. Its investors had run out of patience after nine years and wanted to get out of their investment. It seemed like heresy to industry observers, but we made the decision to acquire TPACK. Interestingly, our action triggered a cascade of similar acquisitions by Altera and Xilinx.

The first step after the acquisition was to align our roadmaps. We needed 100G products. TPACK’s then current offering ranged between 5G and 20G. In addition, we had done a great deal of work in defining our own 100G ASSP. I assembled joint product planning teams and had daily meetings/conference calls. I never would have expected it, but the teams did not come together easily. Each had their own great products (and I agreed--they were both great). Not being familiar with Danish culture, it was not clear to me whether the disagreement was due to the differences between Silicon Valley and Denmark, or if the product types differed so much that they constituted a religious difference. In some ways, it did not matter. The work of developing a product lineup and roadmap that meshed smoothly needed to happen, and fast. We had customers waiting for answers on where this would go, and competitors now breathing down our necks like never before.

I did not believe that legislating a roadmap would work--the buy-in would not be there. Instead, I took a slower, deliberate process of working agreement in small increments, building up to a higher level, congruent series of new products. Thankfully, we got to at least a top-level definition within a couple of weeks. It was “good enough” to go out to customers. We needed to test our game plan, assumptions, and priorities. The customer base was genuinely interested, if only because of the novelty of our approach. In the case of both AppliedMicro and TPACK, there were existing commitments that I was determined to deliver on and did. In other cases, expectations needed to be reset among a number of different stakeholders.

… stay tuned for what happens in the next chapter: External Forces

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