How to select array type in SystemVerilog?

How do we group similar variables or nets? An array is a collection of elements with the same data type. A fixed size array has its size declared at compile time. Each element is stored separately. We can also have multi-dimensional arrays like [1]:

Figure 1: 2D Array [1]

Due complex data structures, SystemVerilog offers flexibility through array types:

1. Static Arrays - Size is known before compilation time.
2. Dynamic Arrays - Size is set at run time with new[n].
3. Associative Arrays - Content is stored with certain key.
4. Queues - Push and pop of data from the array.

The following flowchart can help us select suitable array type for the operation:

Figure 2: Flowchart for selection of array type [1]

Steps 1: Check if index an vector, if not then go for Associative array, if yes check for consecutive index, if again no go for Associative array. In this the index of elements doesn't matter, let that be consecutive index, we choose Associative Array. Since we store elements in sparse matrix. Like in the following image we can see only array index from 0:3, 42, 1000, 4521, 20000.  The memory used to store these is far less than would be needed to store a fixed or dynamic array with 200,000 entries [4].

Figure 3: Associative Array [4]

Step 2: If we need consecutive index in the array type, the next question arises is if the size of array changes over due course of time. If yes, we see at what frequency is the change.

1.   For never change in frequency of array size, we have Fixed Size Array. Packed array is used to refer to dimensions declared before the variable name [3].

int f1[0:15] // 16 ints [0] ... [15]

int f2[16] // 16 ints [0] ... [15]

We can also have multidimensional unpacked and packed arrays.

2. For once change in frequency of array size, we have Dynamic Array. In this size of the array is not known during compilation, but instead it is defined and expanded as needed during runtime [1]. Dynamic array is declared with empty word subscripts []. This means we do not specify the size of array at the compilation, instead we specify it at runtime.

int d1[], d2[]; // Empty Dynamic Arrays

3. For often change in frequency of array size, we have Queues which is a data type where data can be pushed or popped from the array. It is easily recognized by the $ symbol inside square brackets []. In queue, we can easily add and delete elements from anywhere in the array [2,4].

b[$] = {3, 4} // Initial Queue

When you create a queue, SystemVerilog actually allocates extra space so you can quickly add extra elements. Note that you do not need to call the new[] operator for a queue. If you add enough elements so that the queue runs out of space, SystemVerilog automatically allocates additional space. As a result, you can grow and shrink a queue without the performance penalty of a dynamic array [4].

Here, we have discussed how we can select array type according to the storage and index requirement.

References:

1. Functional Verification Training Library by Mentor Graphics (Siemens).
2. https://www.chipverify.com/systemverilog/systemverilog-arrays
3. https://www.chipverify.com/systemverilog/systemverilog-packed-arrays
4. Spear C. SYSTEMVERILOG FOR VERIFICATION A Guide to Learning the Testbench Language Features, 27-37