Siemens Electronic Systems Design & Manufacturing

Most students think PCB design is just placing parts and routing traces. That assumption doesn’t last long. When Margaret Frachioni took a Siemens-sponsored PCB course at Wayne State University, she saw the difference almost immediately. What looked simple at first turned into a system of constraints, rules, and tradeoffs that shape how real boards get built. It wasn’t just about the schematic anymore, it was about the entire environment of the board and how everything interacts. Realizing how design decisions impact manufacturing led her to think differently about how engineering teams actually work, how different groups collaborate, and why professional workflows look the way they do.  Today, she’s a semiconductor hardware engineer at General Motors, where that same foundation helps her navigate technical conversations, understand system-level decisions, and contribute with more confidence. Breaking into the field isn’t just about learning tools. It’s about understanding the system, and taking a step towards learning more about it.  Learn more about Maggie’s experience in this article by Arlina Yang!

For years, PCB verification followed a fragmented flow. One tool for signal integrity. Another for power integrity. Something separate for EMI. And then hours spent stitching results together, translating data, and trying to make sense of how it all connects. That approach makes it difficult to scale as designs get faster, denser, and more interconnected, the real challenge becomes understanding how everything behaves together as a system. But with HyperLynx, engineers can simulate signal integrity, power integrity, EMI, and system behavior all within a single, unified environment all without jumping between disconnected tools. From early schematic exploration to post-layout verification, everything works together from day one. This shift unlocks something important: • Issues can be identified earlier, before they compound • Cross-domain interactions become visible, not guesswork • Fewer prototypes are needed to validate performance • Teams can move from trial-and-error to predictable design flows Read more here: https://sie.ag/59GoC8

And that's a wrap on Hannover Messe 2026! 🎯 We showcased how our integrated digital thread enables end-to-end connectivity from design to production across the mechanical, electrical, software, and electronics domains. Thanks to everyone who stopped by and shared their challenges. See you next year!

Hardware design isn’t slowing down. Boards are getting denser, timelines tighter, and engineering teams more distributed than ever. What used to happen in one location now spans continents, requiring real-time collaboration, tighter constraints, and far more coordination across disciplines. What stood out here is how teams are adapting. Instead of working in silos, engineers are collaborating simultaneously on the same design, reusing proven blocks, and applying constraint-driven templates to handle complexity at scale. With solutions like Xpedition and HyperLynx, that shift becomes real. Simulation, power integrity analysis, and cross-team workflows come together to reduce errors, minimize respins, and ultimately bring products to market faster. Because at this level of complexity, success isn’t just about designing a board. It’s about designing it right the first time. Abaco Systems

For Desay SV, the challenge wasn’t just designing complex automotive PCBs. It was keeping up with how fast everything was changing. Shorter product cycles. More intelligent vehicle systems. And boards pushing the limits of density, performance, and reliability. Each new design brought more layers, more signals, more constraints, and with that, more risk. One extra revision didn’t just slow things down. It meant lost time, higher costs, and more back-and-forth between design and manufacturing. So the team made a shift. Instead of waiting until the end to catch manufacturability issues, they moved DFM analysis earlier into the design process using Xpedition. Running automated checks during layout, before review, and again before handoff, they turned what used to be reactive fixes into proactive decisions. The impact was clear: • 95% reduction in DFM-related revisions • 26% fewer engineering queries from manufacturers • Manufacturing issue rates dropped from 0.84% to below 0.08% But beyond the numbers, the bigger shift was how the team worked. Design and manufacturing became more connected. Issues became visible earlier. And engineers could focus less on rework and more on building better products. Because at this level of automotive complexity, success isn’t just about designing advanced systems. It’s about designing them right before they ever reach production.

Why ECAD-MCAD collaboration is still broken in 2026 — and what needs to change. Most teams aren't failing because of bad engineers. They're failing because their tools are still having the same conversation they were having a decade ago. An electrical team finishes a layout. They export a STEP file. The mechanical team opens it, runs a fit check, finds a clearance issue — and sends an email. Meanwhile, the electrical team has already moved on to the next revision. That's not collaboration. That's a relay race where nobody agrees on the baton. The real problems hiding inside most ECAD-MCAD workflows: → Static file exchange that's outdated the moment it's exported → Design intelligence stripped away — no net data, no designators, just geometry → Mechanical conflicts caught late, when they cost the most to fix → No single source of truth — just two teams, two tools, and a growing gap between them The industry has known about these problems for years. And yet most teams are still patching them with spreadsheets, emails, and manual workarounds. The shift that actually fixes this isn't a better file format. It's a fundamentally connected design environment — where electrical and mechanical teams work from the same data, in real time, with changes that propagate automatically across both domains. That's not a vision. It's what's possible today. At Siemens, we've spent years building exactly this — a unified ECAD-MCAD platform where NX, Xpedition, and Capital work together as a unified system. The result: fewer redesigns, faster handoffs, and mechanical conflicts caught on day one — not day ninety. The question isn't whether your team can afford to make this shift. It's whether you can afford not to. What's the biggest ECAD-MCAD friction point in your workflow right now? Let us know in the comments.

If you’ve ever designed a PCB, you know that some parts of the process can feel like magic, especially when it comes to power delivery systems (PDS) also known as power distribution networks (PDNs). One of the more debated topics is where to put decoupling capacitors on a PCB. Should you place them as close as possible to components? Spread them evenly? Or just cram as many as you can fit? Stephen V. Chavez answers these questions on our blog! https://sie.ag/4YDt2r #PCBDesign #PowerIntegrity #ElectricalEngineering

Designing with chiplets is one thing. Integrating them from multiple foundries and suppliers — with real die-to-die interoperability — is another challenge entirely. At User2User 2026 (April 28 | Santa Clara), engineers from Marvell Technology, Intel, and GlobalFoundries share production results from today's hardest 3D IC problems: PDN analysis, physical verification at scale, thermal co-design, and Calibre 3DSTACK in practice on Intel Foveros. Then the conversation shifts to what comes next. A panel of ecosystem leaders tackles the real constraints holding back broader 3D IC adoption — supply chain access, open chiplet marketplaces, UCIe interoperability in practice, and the co-design methodology gaps that don't show up in the standards documents. Panelists: Jeff Cain, VP Engineering, Chipletz Javier DeLaCruz, Fellow & Sr. Director of Packaging, Boards & Multiphysics, Arm Subramani (Subi) Kengeri, Corp VP/GM Systems to Materials, Applied Materials Satish K. Surana, Director & Principal Engineer, Intel Moderated by Kalar Rajendiran, SemiWiki.com/Confera Corporation Free to attend. 📅 April 28 | Santa Clara, CA 🔗 Register: https://sie.ag/2mj5sR #3DIC #AdvancedPackaging #Chiplets

Your SI, PI, and EMI specialists are some of the most valuable people on your hardware team. So why are they spending their time acquiring models, learning disconnected tools, and doing visual inspections layer by layer, net by net? That's not a people problem. That's a process problem. Electrical sign-off has traditionally meant a specialist doing a manual review at the end of the design cycle. As protocols and layer counts grow more complex, that review takes longer — and the specialists who can do it are harder to find. Their time becomes a bottleneck. HyperLynx DRC takes the routine work off their plate. 100+ out-of-the-box electrical rules — covering SI, PI, EMI/EMC, high voltage safety, and IC packaging — run automatically throughout the layout cycle, embedded directly in Xpedition. These go beyond the spacing and distance checks already in your layout tool: impedance discontinuities on differential pairs, traces crossing split planes, reference plane changes without stitching vias, decoupling caps too far from their power pins. One example: detecting isolated copper on an 8-layer board. Manual visual inspection — 30 minutes to an hour. HyperLynx DRC — the isolated copper plus 27 other potentially harmful instances, found in 2 seconds. For teams with proprietary packages or emerging technology, custom rules are writable in VBScript or Python, with a built-in script writing and debugging environment. Siemens also offers hands-on training for teams who want to build and maintain their own rule libraries. This whitepaper by Rory Riggs covers how the rules are structured, how to configure them for your technology, and where automated checks catch what manual sign-off misses. https://sie.ag/6HacoQ