About
I’m an engineer turned 2x founder who’s spent over a decade building B2B products. Today,…
Articles by Sachin
Activity
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As a founder, what I seek from an event is inspiration and new ideas. Not a place where speakers regurgitate the PR narrative, but one where…
As a founder, what I seek from an event is inspiration and new ideas. Not a place where speakers regurgitate the PR narrative, but one where…
Liked by Sachin Gupta
Experience
Education
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Indian Institute of Technology, Roorkee
93.9
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Activities and Societies: National Service Scheme, Program Management Section(Cultural Council), Cognizance (Technical fest
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Publications
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Efficient Variable Size Template matching Using Fast Normalized Cross Correlation on Multicore Processors
LNCS Springer
Normalized Cross Correlation (NCC) is an efficient and robust way for finding the location of a template in given image. However NCC is computationally expensive. Fast normalized cross correlation (FNCC) makes use of pre-computed sum-tables to improve the computational efficiency of NCC. In this paper we propose a strategy for parallel implementation of FNCC algorithm using NVIDIA’s Compute Unified Device Architecture (CUDA) for real-time template matching. We also present an approach to make…
Normalized Cross Correlation (NCC) is an efficient and robust way for finding the location of a template in given image. However NCC is computationally expensive. Fast normalized cross correlation (FNCC) makes use of pre-computed sum-tables to improve the computational efficiency of NCC. In this paper we propose a strategy for parallel implementation of FNCC algorithm using NVIDIA’s Compute Unified Device Architecture (CUDA) for real-time template matching. We also present an approach to make proposed method adaptable to variable size templates which is an important challenge to tackle. Efficient parallelization strategies adopted for pre-computing sum-tables and extracting data parallelism by dividing the image into series of blocks substantially reduce required computational time. We show that by optimal utilization different memories available on CUDA and using idling time of host CPU to perform independent tasks we can obtain the speedup of the order of 17X as compared to the sequential implementation.
Other authorsSee publication -
Motion Detection in Low Resolution Grayscale Videos Using Fast Normalized Cross Correrelation on GP-GPU
ICAISC, Bhuvaneshwar
Motion estimation (ME) has been widely used in many computer vision applications, such as object tracking, object detection, pattern recognition and video compression. The most popular block based similarity measures are the sum of absolute differences (SAD), the sum of squared differences (SSD) and the normalized cross correlation (NCC). Similarity measure obtained using NCC is more robust under varying illumination changes as compared to SAD and SSD. However NCC is computationally expensive…
Motion estimation (ME) has been widely used in many computer vision applications, such as object tracking, object detection, pattern recognition and video compression. The most popular block based similarity measures are the sum of absolute differences (SAD), the sum of squared differences (SSD) and the normalized cross correlation (NCC). Similarity measure obtained using NCC is more robust under varying illumination changes as compared to SAD and SSD. However NCC is computationally expensive and application of NCC using full or exhaustive search method further increases required computational time. Relatively efficient way of calculating the NCC is to pre-compute sum-tables to perform the normalization referred to as fast NCC (FCC). In this paper we propose real time implementation of full search FCC algorithm applied to gray scale videos using NVIDIA’s Compute Unified Device Architecture (CUDA). We present fine-grained optimization techniques for fully exploiting computational capacity of CUDA. Novel parallelization strategies adopted for extracting data parallelism substantially reduce computational time of exhaustive FCC. We show that by efficient utilization of global, shared and texture memories available on CUDA, we can obtain the speedup of the order of 10x as compared to the sequential implementation of FCC.
Other authorsSee publication
Courses
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Compilers
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Database Management Systems
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Operating System
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Operating System
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Honors & Awards
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Forbes 30 under 30
Forbes
Awarded as Forbes 30 under 30 in the Enterprise Tech category for Asia.
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Forbes 30 under 30
Forbes
Recognized in Forbes 30 under 30 for Enterprise software.
Languages
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English
Native or bilingual proficiency
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Hindi
Native or bilingual proficiency
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