Ruchi Bhargava

As part of the IndiaAI Mission, Avataar is building UAI (Unified AI Interface) - a foundational DPI layer with thin, durable rails for trust and interoperability, connecting models, data and compute into a cohesive, discoverable ecosystem. We are privileged to collaborate with Prof. Ramesh Raskar (MIT) and Project NANDA: Architecting the Internet of AI Agents in shaping a broader “Internet of AI Agents” vision - exploring how a discovery layer for India’s evolving digital public infrastructure can unlock openness, innovation and responsible scale together. Equally grateful to Aafreen Siddiqui Sherwani (United Nations) for anchoring the dialogue, and to Pradeep Gupta (NVIDIA), Tanvi Lall (EkStep Foundation), Vineet Singh (Digital Green) and Jibu Elias (Mozilla Foundation) - for a thoughtful, forward-looking exchange on what it truly takes to build open AI platforms for India. The real opportunity ahead is not just technical, it is architectural. How we design these rails now will shape how intelligence compounds across citizens, enterprises and governance systems for decades. What principles should guide the design of AI infrastructure at national scale? #IndiaAI #DigitalPublicInfrastructure #ViksitBharat

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On-device AI becomes powerful only when it works reliably on real hardware. In this Melange Walkthrough, Yeonseok Kim and Sun-Q Kim break down how the full on-device pipeline works, from model selection and quantization to real-device benchmarking and SDK deployment. Select. Benchmark. Deploy. This is how production-ready on-device AI should operate. Watch the full walkthrough below. #OnDeviceAI #EdgeAI #MobileAI #AIInfrastructure #ZETIC #Melange

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Efficient LLM Inference: Bandwidth, Compute, Synchronization, and Capacity are all you need In the world of large language models (LLMs), memory bandwidth and capacity are pivotal for efficient inference workloads. Discover how optimizing these elements can significantly boost per-user throughput and drive system-level efficiency. Key Takeaways: - Serving LLMs demands 100s of GB per server for model instances, highlighting the importance of memory capacity. - High memory bandwidth is crucial for maximizing throughput. - DRAM-based designs offer superior efficiency in terms of cost and power usage. These insights, drawn from a comprehensive study by NVIDIA Research, highlight the core performance bottlenecks and potential hardware advancements that can redefine LLM deployment strategies. Read the full article here: https://lnkd.in/gNhFm8Ki #AI #LLM #MemoryBandwidth #InferenceWorkloads

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This paper brings clarity to the AGI , offering a rigorous framework for measuring progress. But it also highlights major gaps in today’s AI systems: Long-Term Memory Storage (MS): Current models (like GPT-4 and GPT-5) cannot reliably store new information over time. They suffer from “amnesia,” forcing them to relearn context in every session. Long-Term Memory Retrieval (MR): AI can retrieve facts quickly, but often hallucinates or confabulates, making retrieval unreliable. Working Memory (WM): Large context windows are used as a workaround, but this is inefficient and doesn’t scale for tasks needing persistent context. Capability Contortions: Practitioners rely on external search tools and context windows to mask these memory deficits, but these are not true solutions.   The authors argue that until AI systems can reliably acquire, store, and recall information like humans, claims of AGI are premature. This paper is a good read for anyone interested in the future of AI and what it will take to reach true general intelligence.   Read more: https://lnkd.in/g4v9bc3u   #AI #AGI #ArtificialIntelligence #TechResearch #Memory #FutureOfAI

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How does a startup accelerate development with limited time and resources? At Akeana, co-founder Nitin Rajmohan reveals how Cadence's like Xcelium, Verisium Debug, and Palladium platforms helped them go from simulation to emulation seamlessly, speeding up their development cycle and delivering high-quality IP solutions. Read more: https://ow.ly/20nE30sP3aO

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🤖 From Robotaxis to Physical AI Autonomy gets attention, but the economics determine what lasts. I built a lightweight Robotaxi Cost Model to explore how utilization, deadhead, and operator-to-vehicle ratios drive cost per mile: 👉 https://lnkd.in/gYa2biDn Big takeaway: once safety is solved, utilization and ops efficiency move margins more than incremental autonomy or hardware cost gains. The same patterns show up across Physical AI — mobility, logistics, infrastructure. Always interested in how others are approaching ops and utilization in Physical AI. #Robotics #PhysicalAI #AutonomousVehicles #FleetOperations #UnitEconomics

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*** What does PAM4 brings to the High-Speed Designs *** PAM4 (Pulse Amplitude Modulation with 4 Levels) brings several critical benefits—and some challenges—to high-speed digital designs, especially in domains like SerDes links, high-speed memory (like HBM3), PCIe 6.0+, 800GB Ethernet, and chiplet interconnects (e.g., UCIe, CXL). Key Benefits of PAM4: o Doubles Data Rate Without Doubling Frequency.  - Encodes 2 bits per symbol (4 levels), allowing 56G/112G SerDes and PCIe 6.0 links at lower clock speeds. o Better Utilization of PCB and Interconnects  - Reduces required channel frequency, minimizing signal attenuation and easing material constraints. o Enables High-Density Chiplet Interconnects  - Used in UCIe and CXL to transmit more data over limited physical pads and bumps. Challenges of PAM4 and Mitigations: o Lower SNR / Smaller Eye Openings  - Use equalization, CTLE, and FEC. o Higher Sensitivity to Jitter - Employ advanced CDR techniques. o Increased SerDes Complexity  - Requires precision ADC/DACs and adaptive calibration. What is your experience in designs using PAM4?

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From "General-Purpose GPUs" to "Custom Silicon": A Hardware Inflection Point Indian Startups Shouldn’t Miss Broadcom recently announced it has received over $10 billion in orders for custom AI racks and accelerators. That’s not just a procurement milestone. This marks a decisive shift in AI infrastructure—from broad-spectrum GPU reliance to purpose-built silicon engineered for high-efficiency, scalable performance. This surge reflects growing demand from frontier AI developers like OpenAI and others building large-scale foundation models—who increasingly require specialized infrastructure that goes beyond general-purpose GPUs to meet the scale, efficiency, and latency needs of next-generation training and inference. General-purpose GPUs, while versatile, are increasingly being outpaced by custom silicon when it comes to inference-heavy workloads. ASICs and other specialized architectures offer better power efficiency, reduced latency, and tighter integration for predictable, high-volume operations. And Broadcom isn’t alone. I see, Google continues to evolve its Tensor Processing Units (TPUs). Amazon has deployed Inferentia and Trainium across its cloud stack. Microsoft is building its own Azure Maia and Cobalt chips. There are startups that are reimagining compute from the ground up—focusing on memory bandwidth and wafer-scale innovation. But my main point is, this shift opens a rare window for Indian startups. With the right partnerships and design focus, there’s a clear opportunity to: - Build domain-specific silicon for EV, Automotive, AgriTech, Space, wearables, audio, and other edge AI domains - Leverage fabless models and global foundries to bypass capital-heavy barriers - Create IP-led differentiation in smart devices. There’s no need to replicate legacy architectures. The real opportunity lies in out-specializing them—especially in segments they won’t prioritize. This isn’t just a hardware story. It’s a blueprint for deep-tech sovereignty. Let’s not just observe the AI infrastructure race. Let’s build lanes of our own. Thoughts? #AIHardware #CustomSilicon #IndianStartups #SemiconductorIndia #DeepTech #StrategicAutonomy #TechLeadership #FutureProofIndia

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I had a great conversation with my old friend Arun Trivedi on his AI with Arun Show about semiconductors and AI. We talked about key challenges and opportunities facing the semiconductor industry today, the global chip shortage — moving beyond the headlines to the core supply and demand dynamics, India's strategic position in the global semiconductor value chain — from its strength in design to new manufacturing initiatives, and key skills for the next generation of semiconductor professionals. This conversation will be of interest if you are in the technology, manufacturing, or investment sectors and want to better understand the forces shaping the future of electronics and AI. Watch the full interview here: https://lnkd.in/gCBm-nie #Semiconductor #AI #VLSI #Nanoelectronics #ChipDesign #Manufacturing #Innovation #Careers #IIITD

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Shakti LLM × Qualcomm X-Elite | Vernacular in Action Yesterday, at the #QIF2025 Qualcomm Innovation Forum 2025 @ Bengaluru, we demonstrated the next step in our journey - Shakti LLM running natively on Qualcomm’s X-Elite platform, now engaging in vernacular conversations across Telugu, Kannada, Malayalam, Tamil, and Hindi. This on-device demo shows Shakti’s multilingual capability - seamlessly handling prompts and responses in regional languages through a basic chat interface, powered entirely by the Qualcomm Hardware. Following the showcase at India Mobile Congress, where we presented Shakti running a live RAG application, this demonstration emphasizes how sovereign small language models can deliver real, inclusive intelligence - locally, efficiently, and privately on-device. Captured live from the Qualcomm booth at the Innovation Forum, the clip below highlights Shakti’s fluency across Indic languages - bringing edge AI closer to every user. #QIF2025 #ShaktiLLM #Qualcomm #XElite #OnDeviceAI #EdgeAI #SovereignAI #IMC2025 #QualcommInnovationForum #MakeInIndia #MultilingualAI #SandLogic Qualcomm SandLogic Pushkar Apte Jethin Sekhar R Sanjeev Keskar nasscom nasscom startups nasscom deeptech NASSCOM 10,000 Startups Inc42 Media YourStory Media MeitY Startup Hub MeitY- nasscom Center of Excellence Ministry of Electronics and Information Technology Kavita Bhatia IndiaAI

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Are mixture of expert (MOE) models the future for professionals using local LLMs? Buying enough VRAM for 30-100B MOEs on a Strix Halo mini PC is quite affordable, and the inference speed for the 30B MOE is just awesome. Filmed on Ryzen AI MAX 395+ with 128GB RAM, Vulkan backend, using Lemonade: https://lnkd.in/eDZW7ZZn Great work by Daniel Holanda Noronha sprucing up the interface! Ramakrishnan Sivakumar Victoria Godsoe Tomasz Iniewicz Kalin Ovtcharov

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I am excited to welcome Sankara Venkateswaran to the Ayar Labs team as our new VP of Engineering. As we move into 2026, the industry is hitting a critical inflection point. The "copper wall" is a real-world bottleneck for hyperscale AI, and co-packaged optics has become an infrastructure necessity in future roadmaps. Sankara joins us at a pivotal moment as we move towards mass production. His deep expertise in  compute and networking acceleration silicon from his time at Intel, Qualcomm, and Atheros perfectly complements our leadership in co-packaged optics. He understands the discipline required to deliver production-grade silicon that integrates into the world's most complex packaging flows. With Sankara leading our engineering organization, we are doubling down on our commitment to: - Scale our TeraPHY™ optical engines for high-volume deployment. - Break the power and bandwidth barriers of traditional interconnects. - Deliver predictable, high-quality CPO solutions that meet the aggressive timelines of our partners for the delivery of hyperscale AI infrastructure. Please join me in welcoming Sankara to the team!

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